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MVME7100-0173
MVME從VMEbus背板連接器P1和P2獲取電源。
P2還用于32位傳輸中的高16位數(shù)據(jù)，以及
擴展尋址模式下的8條地址行。MVME可能無法工作
主板未連接到VMEbus背板連接器時正確
P1和P2。
無論MVME是作為VMEbus主設備還是作為VMEbus從設備運行，它
配置為32位地址和32位數(shù)據(jù)（A32/D32）。然而
在第3章所示的地址范圍內(nèi)處理A16或A24設備。D8級
系統(tǒng)中的和/或D16設備必須由MC68040處理/
MC68LC040軟件。請參閱第3章中的內(nèi)存映射。
MVME包含共享板載DRAM，其基址為
軟件可選。車載處理器和非車載VMEbus
設備在基本物理地址$00000000處看到此本地DRAM，如下所示
由MVMEBug固件編程?？赏ㄟ^以下方式進行更改
軟件到任何其他基址。參見MVME嵌入式控制器
更多信息，請參閱程序員參考指南。
如果MVME嘗試訪問不存在位置的非車載資源，并且
不是系統(tǒng)控制器，如果系統(tǒng)沒有全局總線超時，
MVME永遠等待VMEbus循環(huán)完成。這將導致
要鎖定的系統(tǒng)。只有一種情況下，系統(tǒng)可能
缺少此全局總線超時：當MVME不是系統(tǒng)控制器時
系統(tǒng)中其他地方?jīng)]有全局總線超時。
可以在單個VME機箱中安裝多個MVME。一般來說
支持硬件多處理器功能。
注意：如果要在MVME945中安裝多個MVME
機箱，請勿在插槽12中安裝MVME。高度
IP模塊可能會導致該插槽中的間隙困難
位置
VMEbus上的其他MPU可以中斷、禁用、通信和
確定處理器的運行狀態(tài)。GCSR的一個寄存器
（全局控制/狀態(tài)寄存器）集合包括四個用作位置的位
監(jiān)視器允許一個MVME處理器向任何其他處理器廣播信號
MVME處理器。所有八個寄存器都可以從任何本地
處理器以及來自VMEbus的
The MVME draws power from VMEbus backplane connectors P1 and P2. P2 is also used for the upper 16 bits of data in 32-bit transfers, and for the upper 8 address lines in extended addressing mode. The MVME may not function properly without its main board connected to VMEbus backplane connectors P1 and P2. Whether the MVME operates as a VMEbus master or as a VMEbus slave, it is configured for 32 bits of address and 32 bits of data (A32/D32). However, it handles A16 or A24 devices in the address ranges indicated in Chapter 3. D8 and/or D16 devices in the system must be handled by the MC68040/ MC68LC040 software. Refer to the memory maps in Chapter 3. The MVME contains shared onboard DRAM whose base address is software-selectable. Both the onboard processor and offboard VMEbus devices see this local DRAM at base physical address $00000000, as programmed by the MVMEBug firmware. This may be changed via software to any other base address. Refer to the MVME Embedded Controller Programmer’s Reference Guide for more information. If the MVME tries to access offboard resources in a nonexistent location and is not system controller, and if the system does not have a global bus timeout, the MVME waits forever for the VMEbus cycle to complete. This will cause the system to lock up. There is only one situation in which the system might lack this global bus timeout: when the MVME is not the system controller and there is no global bus timeout elsewhere in the system. Multiple MVMEs may be installed in a single VME chassis. In general, hardware multiprocessor features are supported. Note If you are installing multiple MVMEs in an MVME945 chassis, do not install an MVME in slot 12. The height of the IP modules may cause clearance difficulties in that slot position. Other MPUs on the VMEbus can interrupt, disable, communicate with, and determine the operational status of the processor(s). One register of the GCSR (global control/status register) set includes four bits that function as location monitors to allow one MVME processor to broadcast a signal to any other MVME processors. All eight registers are accessible from any local processor as well as from the VMEbus
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